Method and structure for reducing leakage current in capacitors

ABSTRACT

A method of forming a capacitor with reduced leakage current on a substrate in a semiconductor device is set forth. A first layer of a conductive material is formed over the substrate, and a second layer of a dielectric is formed over the first layer. The second layer is contacted with hydrogen, oxygen and nitrous oxide gases to form an oxidation layer over the second layer. A third layer of a conductive material is formed over the second layer to thereby form the capacitor. While the capacitor exhibits an improved leakage current reduction, overall capacitance is substantially unaffected, as compared to a similar capacitor having an oxidation layer built from a combination of oxygen and hydrogen gases only.

FIELD OF THE INVENTION

[0001] The present invention relates to a method of forming a capacitorwith reduced leakage current, and more particularly, to a method ofoxidizing a capacitor dielectric layer so that leakage current acrossthe conductive layers of the capacitor is reduced while capacitance issubstantially unaffected. The invention also relates to the capacitorstructures formed according to the various embodiments of the methodherein set forth.

BACKGROUND OF THE INVENTION

[0002]FIG. 1 illustrates a semiconductor device 110 containing a planarcapacitor structure 114 formed over a substrate 112. The structure ofFIG. 1 is not intended to represent a particular capacitor asconstructed in a semiconductor device, but is merely used as an exampleto illustrate the main components of such a capacitor. Substrate 112 maybe formed, for example, of silicon or silicon-on-insulator (SOI)material or other well known substrate material. A first conductivelayer or bottom electrode 116 is formed over the substrate usingmaterials and methods known in the art. For example, the firstconductive layer may be formed of two layers: a polysilicon bottom layerwith a hemispherical silicon grain, or HSG, layer atop the polysilicon.

[0003] The capacitor structure 114 may be coupled to an active region113 in the substrate, for example a source or drain region of a MOStransistor. Alternately, the capacitor structure 114 may be insulatedfrom the substrate 112 through an insulating region. A capacitordielectric layer 118 is formed over the conductive layer 116, and may beformed of a substantially nonconductive material such as, for example,silicon nitride (Si₃N₄), or other dielectric material known in the art.A thin protective layer 119 is then formed over the dielectric layerusing gaseous oxygen and hydrogen. The protective layer may thuscomprise silicon dioxide (SiO₂) which forms as the oxygen reacts withthe silicon from the silicon nitride in the dielectric. The protectivelayer serves to “heal” any defects in the dielectric layer 118 whichmight cause leakage problems across the resulting capacitor. A secondconductive layer or top electrode 122 is formed over the protectivelayer and may be formed with polysilicon or other conductive material.

[0004] In order to effectively utilize the capacitor 114 in moderndynamic random access memories (DRAMs), however, it has been necessaryto reduce its size and substantially minimize the thickness of thedielectric layer 118. In many embodiments, it is therefore especiallydesirable that the dielectric layer be less than about 60 Angstroms inthickness, and even more desirably, less than about 50 Angstroms thick.Unfortunately, leakage current between the first and second conductivelayers 116, 122 tends to increase exponentially as the thickness of thedielectric layer 118 is reduced to below 50 Angstroms. While formationof the protective layer 119 has been instrumental in helping to reducethis leakage current, there is still considerable need for a furtherreduction to enhance overall capacitor performance, as capacitor sizescontinue to shrink in memory devices.

[0005] What is therefore needed in the art is a new method of forming acapacitor structure which results in reduced leakage current, whileoverall capacitance is substantially unaffected. Also needed are newcapacitors in which leakage current between conductive layers isminimized, while capacitance is substantially maintained.

SUMMARY OF THE INVENTION

[0006] The invention provides a method of forming a capacitor in asemiconductor device in which a first layer of conductive material isfirst formed, a second layer of a dielectric is formed over the firstlayer, the second layer is then contacted with hydrogen, oxygen andnitrous oxide gases to form an oxidation layer over the second layer,and a third layer of conductive material is then formed over the secondlayer. The resulting structure exhibits a lowered current leakage withlittle loss of capacitance when compared with similar capacitorstructures in which the dielectric is built with a conventional hydrogenand oxygen treatment which forms an oxidation layer on the dielectric.

[0007] The invention further provides a method of oxidizing a capacitordielectric by contacting it with hydrogen, oxygen and nitrous oxidegases to form an oxidation layer thereon. Other suitable gases wouldinclude those with an O (oxygen) or F (fluorine) moiety that bondsstrongly to silicon.

[0008] The invention also provides a method of oxidizing a capacitordielectric which involves adding an oxygen containing gaseous material(e.g., nitrous oxide) to a mixture of oxygen and hydrogen gases, andthen contacting the capacitor dielectric with the gaseous mixture so asto form an oxidation layer over the capacitor dielectric. The thusprocessed dielectric has a lower leakage current than does the samedielectric having an oxidation layer formed by contacting the dielectricwith only hydrogen and oxygen gases under the same reaction conditions.

[0009] The invention also provides a method of forming a capacitordielectric over a substrate in which a layer of silicon nitride isdeposited over a conductive layer which has first been formed over asubstrate. The silicon nitride layer is then contacted with hydrogen,oxygen and nitrous oxide gases so as to form an oxidation layer thereon.

[0010] The invention also provides a method of oxidizing a dielectriclayer of capacitor in an intermediate stage of fabrication in which thedielectric layer is exposed to a combination of hydrogen, oxygen andnitrous oxide gases, and the flow rate of the nitrous oxide gas isincreased during oxidation while the flow rate of the hydrogen andoxygen gases are maintained substantially constant. The gas ratio ofnitrous oxide to hydrogen and oxygen can be varied by either changingthe nitrous oxide gas flow rate while keep the hydrogen and oxygen flowrates constant, or vice versa.

[0011] The invention also provides a semiconductor device having asubstrate with at least one capacitor formed thereover. The capacitorincludes first and second conductive layers, with a dielectric betweenthese two layers which has been oxidized in the presence if by hydrogen,oxygen, and nitrous oxide gases to produce an oxidation layer over thedielectric.

[0012] The invention further provides a memory cell of a semiconductordevice which includes a container capacitor. The capacitor has first andsecond conductive layers, a dielectric layer between the conductivelayers and an oxidation layer over the dielectric layer. The oxidationlayer is formed by an oxidation of the dielectric layer in the presenceof a combination of hydrogen, oxygen and nitrous oxide gases.

[0013] The invention further provides an integrated circuit whichincludes at least one capacitor formed over a substrate, wherein thecapacitor contains a first conductive layer, a dielectric layer over theconductive layer, an oxidation layer over the dielectric layer, and asecond conductive layer over the dielectric layer. The oxidation layeris formed by an oxidation of the dielectric layer in the presence of acombination of hydrogen, oxygen and nitrous oxide gases.

[0014] The invention also provides a processor based system whichincludes a processor, and an integrated circuit device coupled to theprocessor. At least one of the processor and the integrated circuitdevice contains a capacitor which includes first and second conductivelayers, a dielectric layer between the conductive layers and anoxidation layer over the dielectric layer. The oxidation layer is formedby an oxidation of the dielectric layer in the presence of a combinationof hydrogen, oxygen and nitrous oxide gases.

[0015] These and other advantages and features of the present inventionwill become more readily apparent from the following detaileddescription and drawings which illustrate various exemplary embodiments.

BRIEF DESCRIPTION OF THE DRAWINGS

[0016]FIG. 1 is a cross sectional view of a conventional planarcapacitor.

[0017]FIG. 2A is a cross sectional view of a semiconductor deviceshowing a capacitor in an intermediate stage of fabrication according toone exemplary embodiment of the invention.

[0018]FIG. 2B is a cross sectional view of the device shown in FIG. 2Ain a further stage of fabrication.

[0019]FIG. 2C is a cross sectional view of the device shown in FIG. 2Bin a further stage of fabrication.

[0020]FIG. 3 is a cross sectional view of a capacitor structureaccording to a further exemplary embodiment of the invention.

[0021]FIG. 4 is a leakage current vs. voltage plot (I-V plot) asmeasured for various capacitors with a cell dielectric at 47 Angstromsafter various oxidation processes according to various exemplaryembodiments of the invention.

[0022]FIG. 5 is a leakage current vs. voltage plot (I-V plot) asmeasured for various capacitors with a cell dielectric at 59 Angstromsafter various oxidation processes according to various exemplaryembodiments of the invention.

[0023]FIG. 6 is a leakage current vs. capacitance plot as measured forthe capacitors of FIGS. 4 and 5, with 47 Angstrom and 59 Angstromdielectric layers respectively, after oxidation processes according tovarious exemplary embodiments of the invention.

[0024]FIG. 7 is a block diagram of a typical processor based systemwhich includes integrated circuits that utilize capacitors constructedin accordance with exemplary embodiments of the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0025] The invention in its broadest embodiment is directed to a methodof fabricating a capacitor for use in a semiconductor device in whichleakage current across conductive layers is reduced, while overallcapacitance is substantially maintained.

[0026] Reference herein shall be made to the term “substrate,” which isto be understood as including silicon, a silicon-on-insulator (SOI) orsilicon-on-sapphire (SOS) structures, doped and undoped semiconductors,epitaxial layers of silicon supported by a base semiconductorfoundation, and other semiconductor structures. In addition, whenreference is made to a “substrate” in the following description,previous process steps may have been utilized to form arrays, regions orjunctions in or over the base semiconductor structure or foundation. Inaddition, the semiconductor need not be silicon-based, but could bebased on silicon-germanium, germanium, indium phosphide, or galliumarsenide. The term “substrate” as used herein may also refer to any typeof generic base or foundation structure.

[0027] Referring again to the drawings in which like numerals indicatelike components throughout the various embodiments, FIG. 2A shows aplanar capacitor 214 formed over a substrate 212 in a semiconductordevice 210 in an intermediate stage of fabrication. Also shown in FIG.2A are a first conductive layer 216 and a dielectric layer 218. Forpurpose of simplification, it will be assumed that planar capacitor 214connects with an active region 113 in substrate 212, though this is notnecessary to the invention. The first conductive layer 216 is formed ofone or more conductive materials, for example, a layer of polysiliconover a layer of HSG, both of which may be deposited over region 113using silane (SiH₄) gas via a chemical vapor deposition (CVD) or lowpressure chemical vapor deposition (LPCVD) process at moderatetemperature of about 500 to 600° C., or other known process in the art.The thickness of the first conductive layer is typically within therange of about a few Angstroms to several hundred Angstroms. Thereafter,the dielectric layer 218 is formed of a substantially non-conductivematerial such as, for example, silicon nitride (Si₃H₄). The siliconnitride dielectric layer 218 may be deposited using dichlorosilane(SiH₂Cl₂) and ammonia (NH₃) gases using LPCVD. It is preferred that thedielectric layer 218 be relatively thin as compared to the conductivelayer 216. More desirably, the dielectric layer 218 should not exceedabout 60 Angstroms in thickness. It is even more preferred that thedielectric layer not exceed about 50 Angstroms in thickness. In certainembodiments, a dielectric layer which is between about 40 to 50Angstroms in thickness, more preferably between about 45 to 50Angstroms, may be especially desirable. The dielectric layer serves asan insulator between the first conductive layer 216 and the secondconductive layer 222, hereinafter defined. While it is desirable thatthe dielectric layer not be too thick, it is also preferred that thislayer not be too thin, as it may not then be a strong enough insulatorto stop charges from passing between the first and second conductivelayers.

[0028] Referring now to FIG. 2B, an oxidation layer 220 is next formedover the dielectric layer 218. As used herein, the term “oxidation” isused to denote an initial oxidation of the dielectric layer, or may beused to denote an oxidation of the dielectric layer which occurs afterprevious oxidation of the dielectric layer has occurred. The oxidationlayer will serve to repair or heal any defects in the dielectric layer218. These defects may take the form of “pinholes” or other openings inthe dielectric layer, which if left untended, could reduce theeffectiveness of the dielectric layer by allowing charges to passthrough. The oxidation layer is formed of an insulative material, e.g.an oxide, which effectively plugs the pinholes in the dielectric layer218.

[0029] To form the oxidation layer 220, the dielectric layer 218 iscontacted with a combination of gases. These include hydrogen, oxygenand nitrous oxide (N₂O) gases. Reaction of the hydrogen, oxygen andnitrous oxide gases typically takes place in an atmospheric furnace at atemperature within the range of about 600 to 1000° C., with about 700 to800° C. being preferred. The flow rates for each of the reaction gasesare within the range of about 1 to 15 standard-liters/minute (slm), moredesirably about 2 to 10 slm. Preferably, the gases are introducedtogether into the atmospheric furnace. The oxidation layer is grown overthe dielectric layer so as to be relatively thin, and preferably is lessthan about 5 Angstroms, and more preferably less than about 3 Angstroms.

[0030] In a preferred embodiment of the invention, the flow rate for thenitrous oxide gas is at least about 0.5 slm, more preferably about 2.5slm, and is even more preferably at least about 5 slm. For somedielectric layers, it may be desirable to have a flow rate for thenitrous oxide of at least about 10 slm. It has now been discovered thatas the flow rate of nitrous oxide introduction is increased, leakagecurrent is reduced, even as all other reaction parameters are keptsubstantially constant. Even more desirably, the flow rates of hydrogenand oxygen gas introduction are maintained constant at a rate within therange of about 4 to 8 slm, with about 5 to 7 slm being more preferredwhile the flow rate of the nitrous oxide gas is increased during theoxidation period. In some embodiments, the flow rate of the nitrousoxide will be within the range of about 0.05 to about 1.7 times that ofthe respective flow rates for hydrogen and oxygen.

[0031] Referring now to FIG. 2C, after oxidation of the dielectric layer218 to form oxidation layer 220 a second conductive layer 222 is formedover the oxidation layer 220. The second conductive layer forms theupper electrode or cell plate of the capacitor 214. The secondconductive layer is deposited using a conductive material and maycomprise, for example, doped polycrystalline silicon, or polysilicon forshort. The second conductive layer of polysilicon may be formed usingsilane gas to deposit the polysilicon. Preferably, deposition takesplace using a CVD or LPCVD process. The thickness of the secondconductive layer can vary from about a few Angstroms to several hundredAngstroms as needed for a particular environment of use.

[0032] It is to be understood that the shape of the formed capacitor 214shown in FIG. 2C is for purposes of illustration only. Those skilled inthe art will recognize that any suitable shape is within the scope ofthe invention, and therefore the capacitor may be a planar, curved orcontainer capacitor, or have other configuration, and may have across-sectional shape of a square, rectangle, oval, trapezoid,parallelogram, or other any other suitable shape, for example.

[0033] It is now been found that the capacitor 214 formed with theoxidation layer 220 using a combination of hydrogen, oxygen and nitrousoxide gases as heretofore set forth exhibits substantially reducedleakage current. For example, the leakage current as measured at −1.6Volts for a thickness of dielectric layer (which is less than or equalto 59 Angstroms) is less than about −3.00 E⁻⁰⁸, and preferably is lessthan about −2.50 E⁻⁰⁸. It is especially preferred that the leakagecurrent be less than about −2.00 E⁻⁰⁸.

[0034] The capacitor 214 of the invention exhibits substantially reducedleakage current as compared to a capacitor having an identical structureexcept that the oxidation layer is formed under the same reactionconditions using only hydrogen and oxygen gases. Thus, it is within thescope of the invention that leakage current of the resulting capacitorcan be reduced by at least about 30% and more desirably by at leastabout 40% as compared to a capacitor formed with an oxidation layerformed using only hydrogen and oxygen gases. In a more preferredembodiment, reduction of leakage current can be at least about 50%.

[0035] The aforesaid reduction in leakage current occurs whilecapacitance of the formed capacitor 214 is substantially unaffected. Asused herein, the term “substantially unaffected” means that any changein capacitance does not exceed about 10%. Once again, the standard forcomparison is a capacitor having a dielectric layer which is formedusing hydrogen and oxygen gases only (with no nitrous oxide) using thesame process conditions and having the same structural configuration.

[0036] The capacitors formed according to the various embodiments of theinvention should have a capacitance which is at least about 20.00 fF/um²as measured at −1.6 volts for a 47 Angstrom thick dielectric layer.

[0037] While not wishing to be bound by any particular theory, itappears that the oxidation layer 220 formed from the combination ofhydrogen, oxygen and nitrous oxide gases more effectively seals thepinholes and cures other defects present in the dielectric layer 220than does a layer formed using hydrogen and oxygen alone under the samereaction conditions. Atomic oxygen (O) might be more effective thanmolecular oxygen (O₂) in this regard, and may reduce the Si, N or otherdangling bonds which generally cause defects in the dielectric layer220. It is perhaps the combination of hydrogen, oxygen and nitrous oxidewhich generates/liberates more atomic oxygen than does the combinationof hydrogen and oxygen gases alone.

[0038] Therefore, it is certainly within the scope of the invention toutilize other chemical compounds or materials which together withhydrogen and oxygen gases may effectively liberate more atomic oxygenthan could otherwise be generated using hydrogen and oxygen alone. Theinvention therefore also comprises utilization of an atomicoxygen-generating material in conjunction with oxygen and hydrogen gasesin the method as heretofore described.

[0039] Referring now to FIG. 3, there is illustrated a furtherembodiment of the invention. Shown is a more traditional containercapacitor structure 314 formed as part of a memory cell of a memorydevice 310. The capacitor structure 314 is formed in an insulator layer324 which in turn is formed of any suitable insulating material such assilicon dioxide, or more preferably Boro-Phospho-Silicate Glass (BPSG).A conductive plug 330 formed in a contact opening 332 between a pair ofgate stacks 334 provides access for the capacitor 314 to a memory cellaccess transistor source/drain region 336 in the substrate 312.Capacitor 314 in FIG. 3 is shown with a first conductive layer 316formed within an opening 332 in insulating layer 324 over the substrate312, a thin dielectric layer 318 formed over the first conductive layer316, an oxidation layer 320 formed as described above over thedielectric layer 318, and the second conductive layer 322 formed overthe oxidation layer 320. If desired, one or more of the capacitorcomponents may be initially formed to extend over the insulator material324 outside of the contact opening 332, and may be subsequentlyplanarized using etch back or chemical mechanical planarization (CMP)techniques to the level shown in FIG. 3.

[0040] The following examples illustrate the invention according tovarious embodiments, but should not be construed as limiting the scopethereof.

EXAMPLE

[0041] Planar capacitor structures (as illustrated in FIG. 2D) wereformed comprising HSG (Hemispherical Silicon Grain) as the bottomelectrode or first conductive layer 216, silicon nitride as thedielectric layer 218, and polysilicon as the top electrode or secondconductive layer 222. In each group an oxidation layer 220 was alsoformed over the dielectric layer before the top electrode wasfabricated. In the capacitors of Group 1 the oxidation layer was formedusing hydrogen and oxygen gases only. For capacitors in Groups 2, 3, 4,the method of the invention was utilized incorporating nitrous oxide inthe oxidation gas mixture. In each of these groups (1 through 4) somecapacitors were formed with dielectric layers having a thickness of 47Angstroms, while in others the dielectric layer thickness was 59Angstroms. The results are shown in TABLE 1: TABLE 1 Group 1 (Control)Group 2 Group 3 Group 4 Group label Group 1- Group 1 Group 2 Group 2Group 3 Group 3 Group 4 Group 4 47A 59A 47A 59A 47A 59A 47A 59A Cellnitride 47A 59A 47A 59A 47A 59A 47A 59A Thickness Post H₂ gas flow: 6slm H₂ gas flow: 6 slm H₂ gas flow: 6 slm H₂ gas flow: 6 slm oxidationO₂ gas flow: 6 slm O₂ gas flow: 6 slm O₂ gas flow: 6 slm O₂ gas flow: 6slm process Temperature: 750 C. N₂0 gas flow: 2.5 slm N₂0 gas flow: 5slm N₂0 gas flow: 10 slm Temperature: 750C Temperature: 750 C.Temperature: 750 C. Thickness of 99A 98A 98A ˜104A oxide on bare Siwafers after oxidation process* Wafer 1,5,9 13,17,21 2,6,10 14,18,223,7,11 15,19,23,25 4,8,12 16,20,24 number

[0042] TABLE 2 shows a comparison of electrical data for the formedcapacitors listed in TABLE 1: TABLE 2 Group 1 Group 2 Group 3 Group 4Group label Group 1- Group 1 Group 2 Group 2 Group 3 Group 3 Group 4Group 4 47A 59A 47A 59A 47A 59A 47A 59A Capacitance 21.08 17.82 20.9517.44 20.69 16.39 20.61 17.35 (fF/um²) Leakage at −4.46E−08 −3.08E−09−2.05E−08 −2.68E−09 −1.88E−08 −2.58E−09 −1.64E−08 −2.68E−09 −1.6 V(A/cm²) Capacitance 1 1 0.99 0.98 0.98 0.92 0.98 0.97 refer to group 1Leakage refer 1 1 0.46 0.87 0.42 0.84 0.37 0.87 to group 1

[0043] From TABLE 2, it can be seen that the capacitors in Groups 2through 4 have significantly reduced leakage current as compared to thecapacitors of Group 1 formed using the conventional oxidation process.In addition, the leakage current data which is obtained is better forthe capacitors with a 47 Angstrom dielectric layer than for capacitorswith a 59 Angstrom layer. Overall, leakage current for the capacitors ofGroup 1 is reduced by 54-63%, while capacitance is reduced by only 1-2%.The capacitors of Groups 2-4 also display leakage current which is notin excess of −3.08 E-08. In particular, the leakage current for thecapacitors with a 47 Angstrom dielectric layer is not in excess of −2.05E-08.

[0044] The performance results are shown plotted in FIGS. 4, 5 and 6(the numbers in the insets represent the wafer numbers from TABLE 1). InFIG. 4, the capacitors of Group 1 (with a 47 Angstrom dielectric layer)show a significant amount of leakage current throughout a range ofvoltages (as indicated by the two lower plotted lines; the plots forwafers 5 and 9 have overlapped in FIG. 4) than do the capacitors of theinvention from Groups 2, 3, and 4. Similar, although not as pronounced,results are shown in FIG. 5 where the three lower descending plotsrepresent the wafers 13, 17 and 21 of Group 1. In FIG. 6, capacitanceperformance has been plotted against leakage current. It is observedthat the capacitance of the wafers of Groups 2, 3 and 4 is substantiallyunaffected (across the x axis) while leakage current is substantiallyimproved, i.e. is less negative in the y direction, as compared to thewafers of Group 1.

[0045] Due at least in part to their improved electricalcharacteristics, the capacitors herein described have wide applicabilityin the semiconductor industry. A typical processor system which includesintegrated circuits that utilize one or more of the capacitors formed inaccordance with the present invention is illustrated generally at 700 inFIG. 7. A processor system, such as a computer system, for example,generally comprises a central processing unit (CPU) 710, for example, amicroprocessor, that communicates with one or more input/output (I/O)devices 740, and a hard drive 750 over a bus system 770 which mayinclude one or more busses and/or bus bridges. The computer system 700also includes a hard disk drive 720, a floppy disk drive 730, a randomaccess memory (RAM) 760, a read only memory (ROM) 780 and, in the caseof a computer system may include other peripheral devices such as acompact disk (CD) ROM drive 730 which also communicate with CPU 710 overthe bus 770. The invention may be used to produce capacitors in one ormore of the processor, RAM and ROM, or a chip containing a processor andembedded memory. While FIG. 7 shows one exemplary computer systemarchitecture, many others are also possible.

[0046] The foregoing description is illustrative of exemplaryembodiments which achieve the objects, features and advantages of thepresent invention. It should be apparent that many changes,modifications, substitutions may be made to the described embodimentswithout departing from the spirit or scope of the invention. Theinvention is not to be considered as limited by the foregoingdescription or embodiments, but is only limited by the construed scopeof the appended claims.

What is claimed as new and desired to be protected by Letters Patent ofthe United States is:
 1. A method of forming a capacitor on a substratein a semiconductor device, comprising: forming a first layer of aconductive material over said substrate; forming a second layer of adielectric over said first layer; contacting said second layer withhydrogen, oxygen and nitrous oxide gases so as to form an oxidationlayer over said second layer; and forming a third layer of conductivematerial over said second layer.
 2. The method of claim 1, wherein saidsecond layer is formed to a thickness not exceeding about 60 Angstroms.3. The method of claim 1, wherein said second layer is formed to athickness not exceeding about 50 Angstroms.
 4. The method of claim 3,wherein said second layer is formed to a thickness within the range ofabout 45 to 50 Angstroms.
 5. The method of claim 1, wherein the ratio ofnitrous oxide to oxygen and hydrogen respectively is in the range ofabout 0.05 to about 1.7.
 6. The method of claim 5, wherein saidcontacting is performed with a gas flow rate of at least about 0.5 slmfor said nitrous oxide.
 7. The method of claim 6, wherein saidcontacting is performed with a gas flow rate of at least about 2.5 slmfor said nitrous oxide.
 8. The method of claim 7, wherein saidcontacting is performed with a gas flow rate of at least about 5 slm forsaid nitrous oxide.
 9. The method of claim 1, wherein said contacting isperformed at a temperature within the range of about 600 to 1000° C. 10.The method of claim 9, wherein said contacting is performed at atemperature within the range of about 700 to 900° C.
 11. The method ofclaim 10, wherein said contacting is performed at a temperature withinthe range of about 700 to 800° C.
 12. The method of claim 1, whereinsaid oxidation layer is formed so as to be thinner than said dielectriclayer.
 13. The method of claim 12, wherein said oxidation layer isformed to a thickness less than about 5 Angstroms.
 14. The method ofclaim 12, wherein said oxidation layer is formed to a thickness lessthan about 3 Angstroms.
 15. The method of claim 1, wherein saidcontacting is performed is performed with a gas flow rate within therange of about 1 to 15 slm for each of said hydrogen, oxygen and nitrousoxide gases.
 16. The method of claim 15, wherein said contacting isperformed with a gas flow rate within the range of about 2 to 10 slm foreach of said hydrogen, oxygen and nitrous oxide gases.
 17. The method ofclaim 16, wherein said contacting is performed at a temperature withinthe range of about 600 to 1000° C.
 18. The method of claim 17, whereinsaid contacting is performed at a gas flow rate for said oxygen which iswithin the range of about 4 to 8 slm.
 19. The method of claim 18,wherein said contacting is performed at a gas flow rate for saidhydrogen which is within the range of about 4 to 8 slm.
 20. The methodof claim 19, wherein said contacting is performed at a gas flow ratewithin the range of about 4 to 8 slm for each of said oxygen andhydrogen.
 21. The method of claim 17, wherein said contacting isperformed at a gas flow rate within the range of about 2.5 to 10 slm.22. The method of claim 21, wherein said contacting is performed at agas flow rate within the range of about 6 to 10 slm.
 23. The method ofclaim 17, wherein said contacting is performed at a temperature withinthe range of about 700 to 800° C.
 24. The method of claim 23, whereinsaid contacting is performed at a temperature of about 750° C.
 25. Themethod of claim 23, wherein said contacting is performed at a gas flowrate for said hydrogen of about 6 slm.
 26. The method of claim 25,wherein said contacting is performed at a gas flow rate for said oxygenof about 6 slm.
 27. The method of claim 25, wherein said contacting isperformed at a gas flow rate for said nitrous oxide of about 2.5 slm.28. The method of claim 23, wherein said contacting is performed at agas flow rate for said nitrous oxide of about 5 slm.
 29. The method ofclaim 23, wherein said contacting is performed at a gas flow rate forsaid nitrous oxide of about 10 slm.
 30. The method of claim 24, whereinsaid contacting is performed at a gas flow of about 6 slm for saidhydrogen, about 6 slm for said oxygen, and about 2.5 slm for saidnitrous oxide.
 31. The method of claim 24, wherein said contacting isperformed at a gas flow rate of about 6 slm for said hydrogen, about 6slm for said oxygen, and about 5 slm for said nitrous oxide.
 32. Themethod of claim 24, wherein said contacting is performed at a gas flowrate of about 6 slm for said hydrogen, about 6 slm for said oxygen, andabout 10 slm for said nitrous oxide.
 33. The method of claim 24, whereinsaid contacting is performed at a gas flow rate of about 6 slm for saidhydrogen, about 6 slm for said oxygen, and within the range of about 1to 15 slm for said nitrous oxide.
 34. The method of claim 33, whereinsaid contacting is performed at a gas flow rate of about 6 slm for saidhydrogen, about 6 slm for said oxygen, and within the range of about 2to 10 slm for said nitrous oxide.
 35. The method of claim 23, whereinsaid second layer is formed to a thickness of about 47 Angstroms. 36.The method of claim 24, wherein said second layer is formed to athickness of about 47 Angstroms.
 37. The method of claim 34, whereinsaid second layer is formed to a thickness of about 47 Angstroms. 38.The method of claim 35, wherein said oxidation layer is formed to bethinner than said dielectric layer.
 39. The method of claim 36, whereinsaid oxidation layer is formed to a thickness less than about 5Angstroms.
 40. A method of forming a capacitor structure in asemiconductor device, comprising: depositing a layer of silicon nitrideover a conductive layer formed over a substrate; contacting said siliconnitride layer with hydrogen, oxygen and nitrous oxide gases so as toform an oxidation layer over said silicon nitride layer.
 41. The methodof claim 40, further comprising forming a second conductive layer oversaid oxidation layer.
 42. The method of claim 41, wherein said secondconductive layer is formed of polysilicon.
 43. The method of claim 40,wherein said silicon nitride layer is deposited to a thickness notexceeding about 60 Angstroms.
 44. The method of claim 43, wherein saidsilicon nitride layer is deposited to a thickness not exceeding about 50Angstroms.
 45. The method of claim 44, wherein said contacting isperformed at a flow rate for said nitrous oxide within the range ofabout 1 to 10 slm.
 46. The method of claim 45, wherein said contactingis performed at a flow rate for said oxygen at a flow rate within therange of about 4 to 8 slm.
 47. The method of claim 46, wherein said flowrate for said nitrous oxide is greater than the flow rate for saidoxygen.
 48. The method of claim 47, wherein the ratio of nitrous oxideto oxygen and hydrogen respectively is in the range of about 0.05 toabout 1.7.
 49. The method of claim 48, wherein said flow rate for saidnitrous oxide is at least greater than the flow rate for said oxygen.50. The method of claim 40, wherein said contacting is performed at atemperature within the range of about 700 to 800° C.
 51. The method ofclaim 50, wherein said contacting is performed at a gas flow rate foreach of said hydrogen and oxygen gases which is within the range ofabout 4 to 8 slm.
 52. The method of claim 51, wherein said contacting isperformed at a gas flow rate for said nitrous oxide gas which is atleast about 2.5 slm.
 53. The method of claim 52, wherein said contactingis performed at a gas flow rate for said nitrous oxide which is at leastabout 5 slm.
 54. The method of claim 53, wherein said contacting isperformed at a gas flow rate for said nitrous oxide which is at leastabout 10 slm.
 55. The method of claim 52, wherein said contacting isperformed at a gas flow rate for each of said hydrogen and oxygen gaseswhich is about 6 slm.
 56. The method of claim 50, wherein said siliconnitride layer is deposited to a thickness of about 45 to 50 Angstroms.57. The method of claim 56, wherein said oxidation layer is formed to athickness less than about 5 Angstroms.
 58. The method of claim 57,wherein said oxidation layer is formed to a thickness less than about 3Angstroms.
 59. The method of claim 50, wherein said contacting isperformed at a gas flow rate of about 6 slm for each of said hydrogenand oxygen gases, and at a gas flow rate within the range of about 2.5to 10 slm for said nitrous oxide gas.
 60. A method of oxidizing adielectric in a capacitor in an intermediate stage of fabricationcomprising: exposing said dielectric to a combination of hydrogen,oxygen and nitrous oxide gases, and increasing the flow rate of saidnitrous oxide gas while maintaining the flow rate of said hydrogen andoxygen gases substantially constant.
 61. The method of claim 60, whereinsaid flow rate of said nitrous oxide gas is increased over the range offrom about 2.5 slm to about 10 slm.
 62. The method of claim 61, whereinsaid exposing is performed at a hydrogen flow rate within the range ofabout 5 to 7 slm.
 63. The method of claim 61, wherein said exposing isperformed at an oxygen flow rate within the range of about 5 to 7 slm.64. The method of claim 60, wherein said nitrous oxide flow rate is atleast about 1½ times greater than the flow rates of each of saidhydrogen and oxygen gases.
 65. A method of forming an oxidized layer ona dielectric material, which comprises exposing said dielectric materialto a combination of hydrogen, oxygen and nitrous oxide gases.
 66. Themethod of claim 65, wherein said forming is effected at a temperaturewithin the range of about 500 to 1000° C., a flow rate for said hydrogenof about 4 to 8 slm, a flow rate for said oxygen of about 4 to 8 slm,and a flow rate for said nitrous oxide of at least about 0.5 slm. 67.The method of claim 66, wherein said forming is effected at atmosphericpressure.
 68. The method of claim 67, wherein said forming is effectedat a temperature within the range of about 700 to 800° C.
 69. The methodof claim 68, wherein said forming is effected at a flow rate for saidnitrous oxide of at least about 5 slm.
 70. The method of claim 69,wherein said forming is effected at a flow rate for said nitrous oxideof at least about 10 slm.
 71. The method of claim 67, wherein saidoxidized layer is formed to a thickness less than that of saiddielectric material.
 72. The method of claim 71, wherein said oxidizedlayer is formed to a thickness less than about 5 Angstroms.
 73. Themethod of claim 71, wherein said oxidized layer is formed to a thicknessless than about 3 Angstroms.
 74. The method of claim 73, wherein saidflow rate for said nitrous oxide is about 0.05 to about 1.7 times theflow rate for each of said hydrogen and oxygen gases.
 75. The method ofclaim 74, wherein said flow rate for said nitrous oxide is at leastgreater than the flow rate for each of said hydrogen and oxygen gases.76. A semiconductor device, comprising: a substrate; a capacitor formedover said substrate, said capacitor including: first and secondconductive layers; a capacitor dielectric formed between said first andsecond conductive layers; said dielectric including an oxidation layerformed by an oxidation of said dielectric in the presence of hydrogen,oxygen and nitrous oxide gases.
 77. The device of claim 76, wherein saiddielectric is not greater than about 60 Angstroms in thickness.
 78. Thedevice of claim 77, wherein said dielectric is not greater than about 50Angstroms in thickness.
 79. The device of claim 78, wherein saiddielectric is between 45-50 Angstroms in thickness.
 80. The device ofclaim 78, wherein said semiconductor device is a memory device.
 81. Aprocessor based system comprising: a processor; and an integratedcircuit device coupled to said processor, at least one of said processorand integrated circuit device containing a capacitor comprising: firstand second conductive layers, a dielectric layer between said conductivelayers and an oxidation layer over said dielectric layer, said oxidationlayer being formed by an oxidation of said dielectric layer in thepresence of a combination of hydrogen, oxygen and nitrous oxide gases.82. The system of claim 81, wherein said first and second conductivelayers are formed of polysilicon.
 83. The system of claim 82, whereinsaid oxidation layer is less than about 5 Angstroms in thickness. 84.The system of claim 83, wherein said dielectric layer does not exceedabout 50 Angstroms in thickness.
 85. The system of claim 84, whereineach of said layers is formed over a substrate.
 86. A memory cell of asemiconductor memory device, comprising: a capacitor; said capacitorincluding first and second conductive layers, a dielectric layer betweensaid conductive layers and an oxidation layer over said dielectriclayer, said oxidation layer being formed by an oxidation of saiddielectric layer in the presence of a combination of hydrogen, oxygenand nitrous oxide gases; and an access transistor for accessing saidcapacitor.
 87. A memory cell of claim 83, wherein said capacitor is acontainer capacitor.
 88. A memory cell of claim 87, wherein saiddielectric layer is comprised of silicon nitride.
 89. A memory cell ofclaim 88, wherein said dielectric layer is less than about 50 Angstromsin thickness.
 90. A memory cell of claim 89, wherein said dielectriclayer is thinner than said first conductive layer.
 91. A memory cell ofclaim 90, wherein said first and second conductive layers are comprisedof polysilicon.
 92. A memory cell of claim 86, wherein said capacitor isformed in an opening in an insulative layer.
 93. A memory cell of claim92, wherein said access transistor comprises a conductive plug formed ina contact opening.
 94. A memory cell of claim 93, wherein saidconductive plug is formed between a pair of gate stacks.
 95. A memorycell of claim 94, wherein said access transistor provides access to asource/drain region formed in a substrate.